AMD EPYC 9684X Genoa-X Provides Incredible HPC Performance

[phoronix]

Phoronix: AMD EPYC 9684X Genoa-X Provides Incredible HPC Performance

Last year AMD launched Milan-X as their first server processors with 3D V-Cache. The performance uplift from the 768MB of L3 cache per socket was phenomenal, but now here we are today with the next-generation successor: Genoa-X. The flagship EPYC 9684X is the new leader for HPC and AI performance as in addition to a 1.1GB L3 cache it leverages AMD's modern Zen 4 micro-architecture with AVX-512, 12 channel DDR5 memory, and other improvements found with existing EPYC 9004 series processors to easily triumph as the new best CPU for high performance computing from CFD and FEA to dozens of other scientific workloads. Here are the first benchmarks of the AMD EPYC 9684X processors.

https://www.phoronix.com/review/amd-epyc-9684x-benchmarks

[NeoMorpheus]

Those numbers are brutal.

Thanks for the review, Michael.

[ddriver]

Yeah intel is lagging behind embarrassingly. But do let me know how their latest purpose specific accelerator is gonna make all the difference in that one single micro benchmark.

[igxqrrl]

Yeah intel is lagging behind embarrassingly.

Not sure why you say that, didn't you see that they released a new font? I don't see that from AMD.

[ddriver]

Not sure why you say that, didn't you see that they released a new font? I don't see that from AMD.

I suppose the font is a byproduct of their mighty presentation slide division.

[JEBjames]

Michael

Typo/grammar

Page1
"In this article is looking at the AMD EPYC 9684X processor while there is also a review of Bergamo too." maybe "This article is looking"...

"finiute element analysis" should be "finite element analysis"

"from the hefty 3D V-Cache -- much of the same areas as Intel's new Xeon Max processors for Sapphire Rapids with HBM2e memory." maybe " -- similar to Intel's"

page 2
"power-efficienct" should be "power-efficient"

[sabian2008]

Wow this is even more brutal than expected. Note however how on particular workloads, Xeon MAX delivers better FLOPS/W, which is the relevant metric.

Even more, for this kind of thing, the Epyc code shoud be compiled with aocc and Xeon with icc. GCC tends to lag behind for very new architectures. I bet that's even more the case with Intel and AMX. People buying HPC generally go with the compiler that gives the more FLOPS.

[pegasus]

ICC is no more. Even Intel's latest compilers are llvm based.

[Spacefish]

Epyc annihilation of Intel

I would like to see another player enter the game, like a 512 core RISC-V Chip or something like that.. Especially for "cloud-native" workloads that could be interesting.

Good competition is important, otherwise prices skyrocket again.. So let´s hope Intel has some design wins in one or two years..

[sabian2008]

ICC is no more. Even Intel's latest compilers are llvm based.

I know, but it doesn't change the intent. As a matter of fact, traditional intel compiler suite was still outperforming their oneapi counterparts until the last Xeon generation (i.e. last year). Nowadays, with AMX, it might be different.