In r600_rlc_init, it seems that the firmware would be stored as big endian dwords, and are programmed using cpu endianness?
I thought the GPU worked only in little endian?
What is the story about this?
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In r600_rlc_init, it seems that the firmware would be stored as big endian dwords, and are programmed using cpu endianness?
I thought the GPU worked only in little endian?
What is the story about this?
The driver code seems to read 32-bit words from the microcode image in memory and write them to the GPU memory mapped register without any intermediate processing, which I *think* avoids endianness issues. I'm a bit rusty on programming on big-endian parts though... I think the 68020 was the last big-endian part I worked on.
Well, it seems the firmware is stored as big endian dwords, but programmed using CPU endianness by using the Linux be32_to_cpup macro.
I noticed in r600_irq_init the use of "ih_cntl |= IH_MC_SWAP(IH_MC_SWAP_32BIT);".
The combination of all that would mean the IH controller work using CPU endianness and not little endian, all the time.
I would conclude the IH microcontroller do work using CPU endianness.