More Radeon Power Management Improvements

[agd5f]

Yes, evergreen is at the same level as previous generations.

[tball]

Can we somehow change the pm settings as user? Or would it be "secure" enough letting a plasma applet change the values as root?

I am considering programming a plasma widget to change the pm settings.

[tball]

Check your current state:
cat /sys/kernel/debug/dri/0/radeon_pm_info

Now you can recheck if your power state changed to the desired one:
cat /sys/kernel/debug/dri/0/radeon_pm_info

Thanks for the mini guide, but my kernel doesn't seem to have any directories within the debug directory. Well it seems that I can set the power mode anyway.

Using latest stable 2.6.35.

[Gaius]

Thanks for the mini guide, but my kernel doesn't seem to have any directories within the debug directory. Well it seems that I can set the power mode anyway.

Using latest stable 2.6.35.

You need to mount debugfs somewhere, like this :

mkdir /debugfs
mount -t debugfs debugfs /debugfs
cat /debugfs/dri/0/radeon_pm_info

Well, for me it works...(r7xx, radeon 4550)...but it seems to slow to get back to normal temperature...I mean, even in low mode, the fan need at least 5 minutes to spin down again after playing a video.
And why are the PCIe lanes are always equals to 16 whatever the profile mode...?

[agd5f]

The pcie lanes are only adjusted if the power profile requests it; not all profiles do.

[Gaius]

And which profile does ? I thought "low" would be the one...
Just a question : is development for powersaving features done ? I mean, it still needs improvement, doesn't it ? Still not as good as the catalyst powerplay....

[smitty3268]

And which profile does ? I thought "low" would be the one...
Just a question : is development for powersaving features done ? I mean, it still needs improvement, doesn't it ? Still not as good as the catalyst powerplay....

I believe the profiles just look up settings from the cards BIOS, which can have card/vendor specific settings in it. So if your cards low-power profile is set to X Mhz core, Y Mhz mem, and 16 lanes, then that's what the driver goes to.

[Gaius]

That's a very bad news indeed...so there is no way it would have someday the same behavior as the catalyst driver (without reflashing the bios) ? I mean what if the only way to reduce even more the energy consumption was to reduce the pcie lanes...it must be done somehow by the catalyst driver...or the dynamic clocking algorithm is different...

[bridgman]

How is that bad news ? All it means is that the current open source power management doesn't do as much as fglrx power management, but that is hardly a revelation, and it says nothing about what can/will happen in the future.

[monraaf]

I mean what if the only way to reduce even more the energy consumption was to reduce the pcie lanes...it must be done somehow by the catalyst driver

Well, the code is open source, so you can reduce the number of pcie lanes yourself to find out. I played around with that a bit when power management was only in the user space driver and I did not find that reducing the number of pcie lanes resulted in lower power consumption, only to instability

FWIW I'm currently using fglrx at the moment and it's using all of the 16 pcie lanes with a HD 5750, regardless of the performance level.