Couple of reasons, I guess. The first is that the RISC processors behind the instruction decoder don't handle things like flow control (branches, jumps, loops etc..) since that is all implemented in the instruction decoders. The second is that each new generation of GPU would require different RISC code (since the number and type of execution units varies from one generation to the next) and without the instruction decoder presenting a consistent programming model all of your code would need to be recompiled each time up upgraded your CPU.
GPUs share the second problem, but since the graphics world essentially uses an interpreter for state and drawing operations, plus a JIT compiler for shader programs, that hides the (constantly changing) instruction sets behind a driver layer.


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Oh, and ARM is quite powerfull considering the amount of power it uses.
