The problem occured in Intelís 6-series H67/P67 chipsets that has two sets of SATA ports. One set handles four 3 Gbit/s drives and the other works with a pair of 6 Gbit/s drives. The transistor of concern is located in the PLL (phase lock loop) clock tree of the 3 Gbit/s controller. The circuit was biased at too high a voltage for the design and this resulted in an excessively high leakage current. This in turn changes the system's characteristics and causes the controller to fail. The other controller is unaffected as well as it has its own PLL.