Prep Work For Open-Source Radeon Compute, UVD

[glisse]

Very simple; you've got multiple layers of hardware security embedded in processing units. For example kernels space is lowest ring (or circle) (if not one above virtualization) that can only do a certain amount of stuff that it is allowed acces to. Apps run in userspace, which is a higher ring.

Apps can't acces certain stuff so it asks the kernel to do it through an API.

This has nothing to do with privilege, though some ring are more restricted it's mostly btw being able to do 3d rendering versus only compute stuff or video stuff. Multiple ring is more like scheduler, having multiple GPU workload at the same time running on the GPU each through different ring. Each ring can keep different part of the gpu busy, one ring can keep busy the video decoder, the other the 3d rendering and another one use a fraction of the gpu for compute or dma or whatever else ...

[DarkFoss]

I know it's a (long)ways off but one small step closer to being able to gpu folding with FAH.

[liam]

This has nothing to do with privilege, though some ring are more restricted it's mostly btw being able to do 3d rendering versus only compute stuff or video stuff. Multiple ring is more like scheduler, having multiple GPU workload at the same time running on the GPU each through different ring. Each ring can keep different part of the gpu busy, one ring can keep busy the video decoder, the other the 3d rendering and another one use a fraction of the gpu for compute or dma or whatever else ...

I thought it had something to do with scheduling and dispatch, so thanks for this!
One quick question, if you don't mind, do you know if this is a standard feature of drivers or is this handled differently in each card? To be clear, is this something that can be generalized enough, through the gallium3d card model, that it need not be rewritten for each card?

Thanks/Liam

[amphigory]

Hopefully UVD is at least partially opened up. The NVIDIA blob with VDPAU works nicely but I'd like to use the OSS stack if possible.

[glisse]

I thought it had something to do with scheduling and dispatch, so thanks for this!
One quick question, if you don't mind, do you know if this is a standard feature of drivers or is this handled differently in each card? To be clear, is this something that can be generalized enough, through the gallium3d card model, that it need not be rewritten for each card?

Thanks/Liam

Gallium is not a single shoe for all. Gallium is a middle layer to allow a common abstraction of high level API such as OpenGL or other. Things like GPU scheduling doesn't beling in gallium and is specific to each GPU, this are deep down in the driver possibly with very little expose to the userspace.

[grigi]

Is this for only the cayman series cards (VLIW-4 instead of VLIW-5) ?
Or also for the older ones?

[agd5f]

Is this for only the cayman series cards (VLIW-4 instead of VLIW-5) ?
Or also for the older ones?

Only cayman has multiple command rings, but older asics will utilize it for UVD if/when the time comes.

[jonwil]

Is this going to be using the dedicated hardware video decoding logic on the cards? And if so, how far back is the support for this dedicated hardware likely to go? Or is the older hardware too tied into DRM crap for the video decoding hardware to be supported by the OSS drivers?

[liam]

Gallium is not a single shoe for all. Gallium is a middle layer to allow a common abstraction of high level API such as OpenGL or other. Things like GPU scheduling doesn't beling in gallium and is specific to each GPU, this are deep down in the driver possibly with very little expose to the userspace.

That was kind of my question. I was wondering if this command ring scheduling was general enough to be in the gallium model.
Thanks for the response.