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Thread: Intel Los Lunas 2, Ivy Bridge Details

  1. #1
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    Default Intel Los Lunas 2, Ivy Bridge Details

    Phoronix: Intel Los Lunas 2, Ivy Bridge Details

    As the latest chapter of the pre-launch Intel Ivy Bridge story, here's some details on Intel's Ivy Bridge reference motherboard, the Los Lunas 2 with the Panther Point chipset. There is also some cpuinfo data on one of the forthcoming Ivy Bridge models.

    http://www.phoronix.com/vr.php?view=17127

  2. #2
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    Wow pasting /proc/cpuinfo and lspci information

    What's next publishing the patches from mailing lists for us to parse through?

  3. #3

    Default CPU flag forAVX2 ?

    One of the reasons I care about Sandy Bridge is its fused-multiple-add instruction (FMA). I assumed Intel was going to designate the presence of that instruction with an "AVX2" cpu flag. But that flag wasn't present in Phoronix's dump of "/proc/cpuinfo".

    Anyone know what the tell-tale flag is going to be for the FMA instruction?

  4. #4
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    Quote Originally Posted by DoofusOfDeath View Post
    One of the reasons I care about Sandy Bridge is its fused-multiple-add instruction (FMA). I assumed Intel was going to designate the presence of that instruction with an "AVX2" cpu flag. But that flag wasn't present in Phoronix's dump of "/proc/cpuinfo".

    Anyone know what the tell-tale flag is going to be for the FMA instruction?
    AVX2 and FMA3 will come next year with Haswell.

  5. #5

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    Quote Originally Posted by FireBurn View Post
    Wow pasting /proc/cpuinfo and lspci information

    What's next publishing the patches from mailing lists for us to parse through?
    Be nice if the article mentioned a lot more of the new features of the CPU rather than the "new, shiny, faster" kind of blurb.

  6. #6
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    Default PTS

    You should have ran it through the Phoronix Test Suite.
    And collected info from lsusb, lshw, dmesg, dmidecode, etc.

  7. #7
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    Quote Originally Posted by uid313 View Post
    You should have ran it through the Phoronix Test Suite.
    And collected info from lsusb, lshw, dmesg, dmidecode, etc.
    I'm sure that's where Michael got the information from - so there's probably some poor sap at Intel getting kicked around the office for publishing the info

  8. #8
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    hmm they put FireWire on there but still no thunderbolt to make it standard on all ivy +, dont they have faith in their own 10gigabit copper/fibre controller yet ?

    im in the market for a few Ivy Bridge and will probably be looking to recommend them in time if there's a substantial improvement but until i see a real life 2012 x264 720/1080P test ill reserve judgement, and yet again i ask for a full x264 supplied "checkasm --bench" , as that would be a very good option to add to the Phoronix standard tests too.

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