did you even read the publicly available spec
http://www.calxeda.com/wp-content/up...-Brief-612.pdf it says right there
"Key Features"
"..Integrated high-performance interfaces such as memory
controllers
with full ECC support
and I/O subsystems for local SATA
2.0 ports and PCIe 2.0 support"
did you blink and miss all these options for ARM you say are missing but in fact are NOT missing at all , in fact some ARM blocks are at the for front of improving speed for everyone even in the x86 space with scalable native PCIe to SSD SOC
http://denalimemoryreport.wordpress....d-ssd-designs/
http://www.marvell.com/storage/syste...rollers-WP.pdf
ECC RAM support hardware blocks are everywhere just because YOUR current ARM Mobile phone SOC doesn't have it specified doesn't mean it doesn't exist perhaps you might try the ARM database first before wrongly assuming next time
http://infocenter.arm.com/help/index...h09s04s02.html its even got its own entry on the latest High speed ARM AMBA 4
AXI bus OC
9.4.2. TCM ECC support
The TCMs can support ECC, as described in TCM internal error detection and correction. If a write transaction is issued to the AXI slave, the slave interface calculates the required ECC bits to store to the TCM. If the write data width is smaller than the ECC chunk size then a read-modify-write sequence is automatically performed by the AXI slave."
what else, oh 64bit samples exist and are being worked on right now
http://lists.linux-foundation.org/pi...ne/000551.html
"
Will Deacon arm.com The majority of work and discussion around the ARM port is currently focussed on platform code and soc support, as shown by the git traffic generated from the new arm-soc tree.
However, there are still a few of us working on the core architecturewhich now has support for large physical addresses, virtualisation and other exciting bits and pieces which require work in the core port. There's also a 64-bit architecture on the way...." and when he says on the way he means generally availability OC ,not it doesn't exist yet, its already with partners.
http://lists.linux-foundation.org/pi...ne/000574.html
"....
PCI breakout session. One of the next major pieces for ARM
consolidation and DeviceTree support is PCI support. More ARM platformsare appearing with PCIe. I think there's opportunity for consolidation with PowerPC DT PCI code."
Samsung sell a 512bit memory bus SOC block and chips etc ....you get the idea, Google an ARM block of your choice and it will probably already exist today, and if so it will be in someones commercial SOC and being used right now somewhere you never even considered... will it be available in ARM YOUR Phone next Tuesday for you to use OC not, but it may already be in that SOC and not even used OC so you would never know, for instance.
http://lists.phcomp.co.uk/pipermail/...ne/004373.html
"Henrik Nordström wrote:> tor 2012-06-14 klockan 19:45 +0800 skrev Tom Cubie:
>
>
>> All hardware? That will be interesting.
There are some peripherals in
>> A10 are never used, nor there are linux drivers for it,even very few
>> people know A10 has that function, like can bus controller, memery
>> stick conroller...
>
> Is the memory stick controller available to be configured on any pins?
> Have only seen references to there being a ms controller but no pin
> information at all. Or any driver...
information on memory stick is subject to NDAs. E.g.
TI always
omitted MS docs for their chipsets and only provided them
to MS NDA customers.."