Page 7 of 22 FirstFirst ... 5678917 ... LastLast
Results 61 to 70 of 217

Thread: MIPS Loongson 3A Benchmarks On Debian

  1. #61

    Default

    @TobiSGD
    QEMU is a emulator also a accelerated emulator is a emulator. And no windows7 do not run on this kind of hardware without emulation and without the use of "Linux".
    Only crazy people would equate the word "emulate" and the word "run".
    Run= nativ 100% speed, no need for linux
    Emulate= not nativ only 70% speed and you need linux and qemu.

    Yes I know your next forum post will be a ***reversal of all logic*** and we will all hail to you Discordia.

  2. #62
    Join Date
    Aug 2007
    Posts
    6,626

    Default

    Maybe you dont get me right. You dont need to attack efibootmgr, you just use it to delete all boot entries and some systems are dead.

  3. #63
    Join Date
    Apr 2012
    Location
    Germany
    Posts
    205

    Default

    Quote Originally Posted by maldorordiscord View Post
    Only crazy people would equate the word "emulate" and the word "run".
    The fact that these CPUs have acceleration units for emulating x86-CPUs with Qemu means that these CPUs are meant by the developers to run x86 code also. That is basically the same as with the old Transmeta Crusoe and Efficeon CPUs, which were not x86-CPUs but CPUs with a VLIW architecture. That they were be able to run x86 code was only made possible through an emulation layer, the Code Morphing Software, which was basically a virtual machine. Nonetheless nobody would say that these CPUs don't "run" Linux or Windows.
    No reversal of logic needed, Qaridarium.

  4. #64
    Join Date
    Jul 2012
    Location
    out there
    Posts
    1

    Default

    I am sorry to hijack your cordial conversation here, but I have a few questions.
    I am not sure to whom this might be addressed, but feel free to comment. I am here to learn.


    What makes you think that if chip has open-source blob it is "hidden" feature free ?

    It is certainly conceivable, that rougue manufacturer has placed a backdoor in the chip even if the blob is open source.
    You see, it could be that the instruction set that is provided to you, as user, might be virtualized, and underneath the hood, you have you micro-supermicro-ops, like intel has. It is easy to imagine, with this in mind, that your firmware(microcode) is just a facade.

    You see, to prove your chip is surprise free, you must disclose full design specification for the chip. Even this, is not good, even though a good starting point. The other stepping stone, in order to prove of sterileness of your chip, is to prove that the concrete chip you provide is built in fact using the very design that you disclosed to the public. One other thing, you have to prove that there are no other features or bugs(known/unknown) in the chip.
    Because of all this, I guess, it is impossible to claim that this or that chip is sterile. Never. You can't trust it.

    Saying that FSF's Stallman(with all due respect to this guy) "approves this message" by using it is just not good enough.

  5. #65

    Default

    @TobiSGD

    "The fact that these CPUs have acceleration units for emulating x86-CPUs with Qemu means that these CPUs are meant by the developers to run x86 code also. That is basically the same as with the old Transmeta Crusoe"

    No this is not the same because one a Transmeta Crusoe you can not run native VLIW code you can only run x86 code no mater you try.
    This means in a consumer viewpoint a Transmeta is a x86 cpu.
    A Loongson Instead is a MIBS cpu and you can only use the x86 acceleration if you start linux and then starting qemu and then start windows and then start the x86 app.
    an intel x86 is also not a CISC he also just emulate a CISC but the consumer only can use the x86 CISC emulation.

  6. #66
    Join Date
    Apr 2012
    Location
    Germany
    Posts
    205

    Default

    If it also can run native code is not relevant. The Crusoe CPUs had a mechanism to update the CMS, so if you as developer write a software in the internal instruction set and replace the CMS with that you are running native native Crusoe code, would be the same attack vector as with Intel's or AMD's microcode you described earlier. May be not possible for the "consumer", you are right, but it is possible.

  7. #67
    Join Date
    Feb 2008
    Location
    Linuxland
    Posts
    5,103

    Default

    Quote Originally Posted by Gödel View Post
    You see, to prove your chip is surprise free, you must disclose full design specification for the chip. Even this, is not good, even though a good starting point. The other stepping stone, in order to prove of sterileness of your chip, is to prove that the concrete chip you provide is built in fact using the very design that you disclosed to the public. One other thing, you have to prove that there are no other features or bugs(known/unknown) in the chip.
    Because of all this, I guess, it is impossible to claim that this or that chip is sterile. Never. You can't trust it.

    Saying that FSF's Stallman(with all due respect to this guy) "approves this message" by using it is just not good enough.
    The most powerful open design would be the OpenSparc, if you have a million burning in your pocket you could have TSMC etc build you some. The check of whether it's really same as the design would need an electron microscope, which is a bit cheaper.

    So it's certainly possible if you have the cash

  8. #68
    Join Date
    Jul 2010
    Posts
    490

    Default

    The discussion here just reminded me of HCF(http://en.wikipedia.org/wiki/Halt_and_Catch_Fire), hehehe.

  9. #69

    Default

    @TobiSGD

    "If it also can run native code is not relevant."

    It is because for the Loongson you get 100% speed if you use native code and also the OpenGL acceleration for the GPU is 100% speed.
    Qemu don't have the features to accelerate openGL/DirectX right now.
    No one will use this hardware for windows because you only do have 70% cpu speed and 0% GPU speed.


    "The Crusoe CPUs had a mechanism to update the CMS, so if you as developer write a software in the internal instruction set and replace the CMS with that you are running native native Crusoe code, would be the same attack vector as with Intel's or AMD's microcode you described earlier."

    AMD,Intel and Transmeta are technically the same a cpu emulate x86 cisc by "microcode"
    Loongson is not the same because the Loongson do not try to emulate an x86.
    This cpu emulate a MIPS cpu by microcode and the x86 acceleration is just a emulation feature but you get the best result if you use native MIPS code and native OpenGL code without any emulation.

    "May be not possible for the "consumer", you are right, but it is possible."

    sure its a attack vector but not a use case scenario because you lost 100% of the openGL acceleration and you lost 30% of the cpu speed.
    be sure no one will buy such a system to only run windows7.

  10. #70
    Join Date
    Apr 2012
    Location
    Germany
    Posts
    205

    Default

    Quote Originally Posted by maldorordiscord View Post
    AMD,Intel and Transmeta are technically the same a cpu emulate x86 cisc by "microcode"
    Loongson is not the same because the Loongson do not try to emulate an x86.
    This cpu emulate a MIPS cpu by microcode and the x86 acceleration is just a emulation feature but you get the best result if you use native MIPS code and native OpenGL code without any emulation.
    Of course you don't get 100% speed. would be nice to have some numbers how fast a program that would be written for the internal architecture of an AMD or Intel CPU is in comparison to the emulated x86 code. If it would be around the same numbers this would somewhat negate your argumentation. By the way, PCI passthrough is experimental at this time and i doubt that it will take long that this works reliable. If it works you can run native OpenGL in the VM.

    be sure no one will buy such a system to only run windows7.
    I am sure that nobody will do this. That is why I said:
    The fact that these CPUs have acceleration units for emulating x86-CPUs with Qemu means that these CPUs are meant by the developers to run x86 code also
    But anyways, I would think about such a CPU for my next file-server or maybe a netbook or notebook, but I am a gamer, so it has to be x86 on my main rig.

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts
  •