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Thread: Gallium3D's LLVMpipe Now Handles Wider Registers

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    Default Gallium3D's LLVMpipe Now Handles Wider Registers

    Phoronix: Gallium3D's LLVMpipe Now Handles Wider Registers

    If you have an AVX-enabled processor like Intel's Sandy/Ivy Bridge or AMD's Bulldozer, there's some good news should you be relying upon Mesa's Gallium3D LLVMpipe driver...

    http://www.phoronix.com/vr.php?view=MTE0MjM

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    It's quite the commit... http://cgit.freedesktop.org/mesa/mes...e70393f01c6041
    Is that good style to just squash that much?

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    Quote Originally Posted by ChrisXY View Post
    It's quite the commit... http://cgit.freedesktop.org/mesa/mes...e70393f01c6041
    Is that good style to just squash that much?
    This is usually done to allow for easier bisecting - especally is there is breakage between individua commits

  4. #4

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    Does it use the FMA in the bulldozers? I believe that it is a handy operation in graphics processing.

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    Quote Originally Posted by ssam View Post
    Does it use the FMA in the bulldozers? I believe that it is a handy operation in graphics processing.
    No. Note this is not related to wider vectors.
    It should be possible to turn some multiply/adds into muladds. llvm itself does not have a fma or muladd in the core (the difference between the two is the latter says it's ok to either fuse or not the multiply/add hence there's no disadvantage in using it on cpus not supporting fma), only llvm intrinsics, hopefully the backends actually support them (I'm not sure that llvm muladd intrinsic supports vectors neither, fma mentions it but not muladd).
    But either way there won't be much gain. Performance is typically dominated by texturing, which is all integer in the optimized path (though Bulldozer should be able to do mad with ints too actually, there are no special llvm instructions for that, in theory the code generator should be able to fuse muls/adds on its own with ints).
    For someone interested it should be pretty easy to experiment with that.

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