AMD Drops Steamroller "bdver3" Compiler Support

[phoronix]

Phoronix: AMD Drops Steamroller "bdver3" Compiler Support

Second-generation Bulldozer processors only started appearing recently in the form of the Trinity APUs with Piledriver cores. The next Bulldozer-2 wave will come when AMD releases their Piledriver-bearing "Vishera" FX-Series desktop processors. While this hardware has yet to publicly arrive, AMD is are already working on compiler support for their third-generation Bulldozer -- a.k.a. "Steamroller" -- micro-architecture...

http://www.phoronix.com/vr.php?view=MTIwNDY

[phred14]

Poor choice of wording in the title. When you said "drops" I thought that meant that AMD was so resource-constrained that they had dropped development support on "bdver3" for gcc. Instead "drops" means that they've sent the first patch, already. Pretty much the opposite meaning.

[elmo23x]

Poor choice of wording in the title. When you said "drops" I thought that meant that AMD was so resource-constrained that they had dropped development support on "bdver3" for gcc. Instead "drops" means that they've sent the first patch, already. Pretty much the opposite meaning.

From the title I just understood the opposite to the content of the article. So I wanted to same the same say as you did... but not being English my native language I was not sure about my language skills.

[DeiF]

Looking forward for the Vishera benchmarks.
I'm going to upgrade my PC soon and I need to know if AMD will be a viable option or not.

It would be great to have a look at Vishera-compatible motherboards too, like the new Asus Crosshair V Formula-Z.
Specially I'd want to see how well Linux interacts with UEFI and the new features like "Fast Boot" (this one being labeled as a Windows 8 feature, which the aforementioned motherboard supports with a hardware switch).

[GreatEmerald]

Yea, shouldn't the title say "Drops in" instead of just "Drops"?

[schmidtbag]

I understood the meaning when I saw it but I can understand the confusion. However, I think what got me to not get confused was that I didn't know this existed, so it made more sense to me.

[Detructor]

cool, I recognized some of the words used in this article

(the only thing I get from this article is, that I may be buying a AMD CPU in 2013 and a new mainboard...finally)

[LinuxID10T]

Anyone else recognize that the big part should be the fact that steamroller has 3 FP units?!? It was one of bulldozers biggest weaknesses having 1 FP unit!

[seronx]

Anyone else recognize that the big part should be the fact that steamroller has 3 FP units?!? It was one of bulldozers biggest weaknesses having 1 FP unit!

AMD bdver1 Scheduling
+;;
+;; The bdver1 contains four pipelined FP units, two integer units and
+;; two address generation units.
+;;
+;; The predecode logic is determining boundaries of instructions in the 64
+;; byte cache line. So the cache line straddling problem of K6 might be issue
+;; here as well, but it is not noted in the documentation.
+;;
+;; Three DirectPath instructions decoders and only one VectorPath decoder
+;; is available. They can decode three DirectPath instructions or one
+;; VectorPath instruction per cycle.
+;;
+;; The load/store queue unit is not attached to the schedulers but
+;; communicates with all the execution units separately instead.