ARM Cortex-A15 GCC Compiler Tuning Performance
Phoronix: ARM Cortex-A15 GCC Compiler Tuning Performance
To complement the recent compiler benchmarking on the ARM Cortex-A15 as found in the Samsung Exynos 5 Dual with the Samsung Chromebook, here's some compiler tuning benchmark results from the speedy low-power ARM system...
Does gcc even have Cortex-A15 optimizations (and not just map cortex-a15 options to generic armv7-a)? I can't find anything like cortex-a15.md in the gcc sources...
cortex-a15.md exists at least on the trunk: http://gcc.gnu.org/viewcvs/trunk/gcc/config/arm/
Originally Posted by ssvb
I didn't look at the 4.7 branch since the SVN web interface is so slow...
EDIT : also in 4.7 branch: http://gcc.gnu.org/git/?p=gcc.git;a=...gcc-4_7-branch
Last edited by ldesnogu; 12-04-2012 at 02:25 PM.
Right, just spotted it there. I wonder how could I have missed it earlier when I got my Chromebook and tried to get a good understanding of Cortex-A15 instruction scheduling rules. The vendor documentation is unfortunately getting progressively worse with each new CPU core. The "Cycle Timings and Interlock Behavior" section of Cortex-A9 TRM was already a joke.
EDIT: that must have been gcc 4.6, it has some cortex-a15 references, but no cortex-a15.md file.
Last edited by ssvb; 12-04-2012 at 02:55 PM.