It's not really clear from my mailing list message or the article, but the indirect addressing support is currently for compute only. The TGSI->LLVM implementation for r600g and radeonsi does not translate indirect addressing yet, so that would need to be done before indirect addressing will work for graphics. In addition, the indirect addressing support in the backend is not really suitable for graphics, because it only supports a maximum of 16 dwords for indirect addressing, which is not really enough for most graphics shaders, especially since with TGSI one must assume that all registers might potential be accessed via indirect addressing.
My priority now is to improve compute support in the compiler, I don't have any near term plans to work on indirect addressing for r600g graphics shaders. However, the TGSI->LLVM piece will likely be implemented when indirect addressing support is added to radeonsi.


Reply With Quote

