Intel Submits Latest CXL Feature Code For Linux 6.8
For Linux 6.8 there is more CXL work around Coherent Device Attribute Table (CDAT) parsing and Quality of Service (QoS) infrastructure work as well as other core enablement work still ongoing for CXL ahead of more Linux servers debuting with CXL connectivity.
Williams explained in the pull request of CXL updates for Linux 6.8:
"The bulk of this update is support for enumerating the performance capabilities of CXL memory targets and connecting that to a platform CXL memory QoS class. Some follow-on work remains to hook up this data into core-mm policy, but that is saved for v6.9. The next significant update is unifying how CXL event records (things like background scrub errors) are processed between so called "firmware first" and native error record retrieval. The CXL driver handler that processes the record retrieved from the device mailbox is now the handler for that same record format coming from an EFI/ACPI notification source. It also contains miscellaneous feature updates, like Get Timestamp, and other fixups."
He also added in the pull request around more controls that Linux will have over buggy behavior:
"For someone who might be interested in platform firmware history, i.e. the evolution of data structures passed to an OS to enumerate memory resources and capabilities, I think this update marks an inflection point.
ACPI has long enumerated details about the platform that have no standard enumeration. It produces tables like SRAT, SLIT, and HMAT to describe the NUMA topology (ACPI proximity domains) and the relative performance of an initiator, like a CPU, in one proximity domain talking to a target, like memory, in another.
The algorithm for where proximity domain boundaries are drawn and the veracity of the "NUMA distance" values have long been in the category of, "just trust the ACPI tables". However, with this update Linux is empowered, at least for CXL, to enumerate those details itself. This is important because ACPI is a boot time static enumeration with limited update capabilities. That limitation is a liability in a CXL world that supports hotplug, dynamic reconfiguration, pooling, and accelerators with their own memory subsystems.
So now when core-mm developers notice broken memory NUMA information they can send a patch to the CXL subsystem rather than a bug report to the platform vendor."
Exciting times ahead in the CXL space.
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