AMD's GPU LLVM Backend Gains Support For Assembler & Inline Assembly
Tom Stellard of AMD has landed initial support into the AMD GPU LLVM back-end for the assembler and supporting inline assembly.
Stellard's commit explained, "This is currently considered experimental, but most of the more commonly used instructions should work. So far only SI has been extensively tested, CI and VI probably work too, but may be buggy. The current set of tests cases do not give complete coverage, but I think it is sufficient for an experimental assembler."
For the Southern Islands, Sea Islands, and Volcanic Islands, all DS / non-atomic MUBUF / SOP1 / SOP2 / SOPC instructions are supported by the assembler and some SMRD instructions. Those wanting to learn more about these instructions can see the Southern Islands ISA documentation.
This initial AMD GPU assembler support will be found in the LLVM 3.7 release.
Stellard's commit explained, "This is currently considered experimental, but most of the more commonly used instructions should work. So far only SI has been extensively tested, CI and VI probably work too, but may be buggy. The current set of tests cases do not give complete coverage, but I think it is sufficient for an experimental assembler."
For the Southern Islands, Sea Islands, and Volcanic Islands, all DS / non-atomic MUBUF / SOP1 / SOP2 / SOPC instructions are supported by the assembler and some SMRD instructions. Those wanting to learn more about these instructions can see the Southern Islands ISA documentation.
This initial AMD GPU assembler support will be found in the LLVM 3.7 release.
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