Hitting Coreboot Git with this commit by Ron Minnich is a clean-up of the RISC-V code. He mentioned with the changes, "This version of coreboot successfully starts a Harvey (Plan 9) kernel as a payload, entering main() with no supporting assembly code for startup. The Harvey port is not complete so it just panics but ... it gets started. We provide a standard payload function that takes a pointer argument and makes the jump from machine to supervisor mode; the days of kernels running in machine mode are over."
Then today Minnich added initial lowRISC SoC support. For the uninformed, lowRISC is one an open-source, Linux-capable RISC-V based SoC design that's still in-progress but quickly becoming a reality.