OpenGL 4.0 Patches For Intel Ivy Bridge Revised
While yesterday's Mesa 17.0 release took Intel Haswell hardware from OpenGL 3.3 to OpenGL 4.5, this quarterly update didn't end up bring the older Ivy Bridge hardware past OpenGL 3.3. But consulting firm Igalia has continued working on their patches to bring Ivy Bridge hardware up to OpenGL 4.0.
Hopefully we'll see this patch series land for Mesa 17.1: Igalia has sent out their third revision to a set of patches for enabling ARB_gpu_shader_fp64 for Ivy Bridge and it's the last extension needed for this generation prior to Haswell for having OpenGL 4.0 support. Let's just hope now that the patches will be reviewed in a timely manner so that they can land.
The 24 patches sent out today add FP64 support to the Intel driver's align16 and align1 back-ends, allowing OpenGL 4.0 to be exposed for IVB. From Samuel Iglesias Gonsálvez, "This is the third version of the patch series that includes, among other fixes, a working DF MOV INDIRECT support for IvyBridge, improvements in the d2x legalization pass, improvements in the regioning parameters handling for DF instructions on IVB, and validator changes to detect misbehaviours in the generated code."
These patches, however, do not have register spilling support for 64-bit FP64 data. The patches can be found on Mesa-dev.
Hopefully we'll see this patch series land for Mesa 17.1: Igalia has sent out their third revision to a set of patches for enabling ARB_gpu_shader_fp64 for Ivy Bridge and it's the last extension needed for this generation prior to Haswell for having OpenGL 4.0 support. Let's just hope now that the patches will be reviewed in a timely manner so that they can land.
The 24 patches sent out today add FP64 support to the Intel driver's align16 and align1 back-ends, allowing OpenGL 4.0 to be exposed for IVB. From Samuel Iglesias Gonsálvez, "This is the third version of the patch series that includes, among other fixes, a working DF MOV INDIRECT support for IvyBridge, improvements in the d2x legalization pass, improvements in the regioning parameters handling for DF instructions on IVB, and validator changes to detect misbehaviours in the generated code."
These patches, however, do not have register spilling support for 64-bit FP64 data. The patches can be found on Mesa-dev.
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