Going Through Intel's Graphics Execution Manager
For developers looking to get into Linux graphics driver programming or just wanting to know how Intel's Graphics Execution Manager (GEM) works within the Linux kernel, here's a guide.
The Graphics Execution Manager is Intel's form of memory management within the Linux kernel for use by their i915 DRM graphics driver. GEM is an alternative to using TTM, as done internally by the Radeon and Nouveau drivers.
For the past few months, Daniel Vetter of Intel's Open-Source Technology Center has been writing a guide about GEM. Daniel's "i915/GEM Crashcoure" is split into four parts and in the first part covers different address spaces of i915 GEM buffer objects as well as page table setup. Part 2 goes through submitting work to the graphics processor and tracking the GPU progress and command submission along with relocation handling, command retiring, and synchronization. Part 3 covers the memory management in more detail and GTT space and what happens under video memory pressure. The final part goes through coherency and caches and efficienctly transferring data between GPU coherency domains and the CPU coherency domain.
Those wanting to read through Vetter's technical ramblings about i915/GEM, the writings are on his personal blog.
The Graphics Execution Manager is Intel's form of memory management within the Linux kernel for use by their i915 DRM graphics driver. GEM is an alternative to using TTM, as done internally by the Radeon and Nouveau drivers.
For the past few months, Daniel Vetter of Intel's Open-Source Technology Center has been writing a guide about GEM. Daniel's "i915/GEM Crashcoure" is split into four parts and in the first part covers different address spaces of i915 GEM buffer objects as well as page table setup. Part 2 goes through submitting work to the graphics processor and tracking the GPU progress and command submission along with relocation handling, command retiring, and synchronization. Part 3 covers the memory management in more detail and GTT space and what happens under video memory pressure. The final part goes through coherency and caches and efficienctly transferring data between GPU coherency domains and the CPU coherency domain.
Those wanting to read through Vetter's technical ramblings about i915/GEM, the writings are on his personal blog.
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