Coreboot Ported To RISC-V Architecture
Coreboot has now been ported to UC Berkeley's RISC-V architecture and can at least work in an emulated environment.
Coreboot was ported to the open-source RISC-V architecture not because Google is pursuing it for future Chromebooks or the like, but rather as an example in porting Coreboot to new architectures. Ronald Minnich explained, "it forms a nice case study of the bare minimum you need to add to get a new architecture going in QEMU."
Coreboot developers agreed to add RISC-V architecture support, the SoC, and emulated motherboard support to Coreboot. This Coreboot code is then able to run in the RISC-V version of QEMU.
Adding the CPU architecture to Coreboot is just over two thousand lines of code and can be found via this Git commit.
Coreboot was ported to the open-source RISC-V architecture not because Google is pursuing it for future Chromebooks or the like, but rather as an example in porting Coreboot to new architectures. Ronald Minnich explained, "it forms a nice case study of the bare minimum you need to add to get a new architecture going in QEMU."
Coreboot developers agreed to add RISC-V architecture support, the SoC, and emulated motherboard support to Coreboot. This Coreboot code is then able to run in the RISC-V version of QEMU.
Adding the CPU architecture to Coreboot is just over two thousand lines of code and can be found via this Git commit.
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