Details On Using OpenACC & GPUs With GCC

Written by Michael Larabel in GNU on 18 December 2014 at 08:56 PM EST. Add A Comment
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With OpenACC, NVIDIA's NVPTX back-end, and other improvements finally materializing within mainline GCC and its related code-bases, users are beginning to wonder how to actually use these new GCC features and experience GPU offloading with this free software compiler.

This week on the GCC mailing list was a posting asking how to use OpenACC 2.0 with GCC. There were many responses by GCC developers, so here's a recap of that thread for those interested in OpenACC/GPGPU for GCC:

- OpenMP 4.0 support is in the latest SVN code with support for Intel's Xeon Phi MIC hardware. The GCC Xeon Phi support is limited to the Knights Landing (KNL) hardware and not the older Knights Corner (KNC) hardware.

- Knights Corner support for GCC likely won't come as it's the older Intel Xeon Phi architecture. With Knights Landing it's the same vector ISA as future Intel desktop/server CPUs and not some completely different ISA not found in other Intel CPUs like is the case with Knights Corner. Jakub Jelinek of Red Hat explained, "to support KNC we'd need to make the i?86 backend larger and more complicated for something that is not going to be used in any? future CPUs."

- Those wishing to build GCC with support for accelerators/GPUs should see the offloading Wiki page. That information is relevant to OpenACC/OpenMP interfaces and for Intel Xeon Phi and NVIDIA PTX back-ends.

- In building support for accelerators with GCC, you basically need to configure and build a copy of the GCC compiler for the host and each accelerator target you wish to support, e.g. three copies of GCC would be present on the system if compiling for your local CPU, the Xeon Phi, and NVIDIA PTX.

- The OpenACC code isn't yet fully in trunk but is still a hope for the GCC 5 release in 2015. The code not yet merged is in the gomp-4_0 branch.

- There is some AMD HSA (Heterogeneous System Architecture) code in an "hsa" SVN branch. However, this AMD HSA code is limited and for now is believed to just handle some OpenMP 3.x loops with OMP4 and OpenACC lacking.
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