LowRISC To Feature Tagged Memory & Minion Cores
Earlier this year we wrote about lowRISC as an open-source SoC design using the RISC-V ISA. LowRISC hopes to ultimately get into volume silicon production and now they've released some documentation describing two planned features.
The first lowRISC chip has two features they've explained in their new documentation called tagged memory and minion cores. Tagged memory is a security feature for preventing control-flow hijacking and other capabilities. The minion cores feature are small, energy-efficient RISC-V cores to implement common I/O protocols. These minion cores can be used for smart I/O.
Those wishing to learn about lowRISC's minion cores and tagged memory can read their new documentation.
The first lowRISC chip has two features they've explained in their new documentation called tagged memory and minion cores. Tagged memory is a security feature for preventing control-flow hijacking and other capabilities. The minion cores feature are small, energy-efficient RISC-V cores to implement common I/O protocols. These minion cores can be used for smart I/O.
Those wishing to learn about lowRISC's minion cores and tagged memory can read their new documentation.
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