QEMU Merges Initial Support For nanoMIPS

[phoronix]

Phoronix: QEMU Merges Initial Support For nanoMIPS

Earlier this year MIPS rolled out the I7200 processor core built on the new "nanoMIPS" architecture. The open-source enablement of this new CPU ISA continues to settle down while the latest accomplishment is support for this new architecture in QEMU...

http://www.phoronix.com/scan.php?page=news_item&px=QEMU-nanoMIPS-Support

[uid313]

Is this MIPS or nanoMIPS appealing in any way?
When there are ARM and RISC-V?

[tildearrow]

Typo in the short description:

QEMU + nanonMIPS

[squash]

Is this MIPS or nanoMIPS appealing in any way?
When there are ARM and RISC-V?

RISC-V isn't really a thing, commercially, not to mention immature, inefficient, expensive, and very slow. So let's ignore them for this discussion because while they are doing great work and are very promising, we aren't in a fantasy land where an yof that matters.

ARM is absolutely a thing but MIPS has a very strong following in places like network processing that they've had for a long time, where ARM doesn't really exist. Grab the biggest, meanest Cisco router you can find (the kind your ISP's ISP uses) and you'll find MIPS inside. Grab the cheapest little router on Amazon and you'll find MIPS inside it. Gran just about any dynamic audio processing platform and the're probably a MIPS inside it.

nanoMIPS is a great step forward for the 32 bit embedded space. It's crazy low power with SMP/SMT and a bunch of awesome features for multithreading in real time environments, super low cost context switches, and now VMT. In this power range they've got lots of great features over ARM.

MIPS isn't dead or obsolete, they're going to ship a billion of these chips.

[some_canuck]

wish I could start a new qemu vm on the sparc target, but it only works with pre-existing disk images.