It Looks Like Raptor Is Gearing Up To Release A New Open-Source POWER System

[phoronix]

Phoronix: It Looks Like Raptor Is Gearing Up To Release A New Open-Source POWER System

Raptor Computer Systems began their open-source hardware expedition with the POWER8-based Talos Secure Workstation that was quite expensive but last year launched the Talos II platform with IBM POWER9 processors and earlier this year launched the Raptor Talos II Lite systems at a cheaper price-point but still quite a significant investment compared to x86_64 AMD/Intel products. They've been pushing ahead on making their platform more viable for Linux users as well as more affordable and it looks like they will soon be launching a new product...

http://www.phoronix.com/scan.php?page=news_item&px=Raptor-Prepping-New-POWER

[milkylainen]

Since the IBM Power9 does have NVLink... any chance of a NVLink interface from the CPU that could be used with an GPU or FPGA devboard?

[microcode]

Which part of this is "open" ?

[hsivonen]

Does any POWER9 CPU have a TDP that could accommodate a fanless chassis design? (Airtop can house a Xeon.)

[starshipeleven]

Which part of this is "open" ?

Unless something changes dramatically, board firmware and microcode should still be open as they are with the current product, they also managed to convince IBM to publish full hardware manuals or something like that (which is important for board firmware development), the stuff Intel keeps behind NDAs for their hardware.

It's not "open hardware" in a strict sense. I don't think they have board and CPU schematics.

[starshipeleven]

Does any POWER9 CPU have a TDP that could accommodate a fanless chassis design? (Airtop can house a Xeon.)

Yeah, the low-end Power9 CPUs with 4 cores are in the 90w TDP range https://www.raptorcs.com/content/CP9M01/intro.html
The 8 core has 160w TDP, and 190w TDP for the 18 and 22-core CPUs.

You need to look what xeon they put in the Airtop as there are low-power xeons too.

[torsionbar28]

Yeah, the low-end Power9 CPUs with 4 cores are in the 90w TDP range https://www.raptorcs.com/content/CP9M01/intro.html
The 8 core has 160w TDP, and 190w TDP for the 18 and 22-core CPUs.

You need to look what xeon they put in the Airtop as there are low-power xeons too.

Yes but there are supposed to be new POWER9 SKU's coming to market that are scaled down internally. e.g. SMT4 vs. SMT8. I would imagine these new scaled down parts would consume proportionately less power, and also come in at a lower price point. Maybe that's what this new Raptor board will be using to achieve a new low price point?

[madscientist159]

Timothy from Raptor here. While many of the details of this new system will be kept under wraps until the reveal at the OpenPOWER Summit in October, I'll try to answer some of the more generic questions below. Also note that this new machine is designed to accept the low-end Sforza parts, if you want more than 4-8 cores you should look at the Talos II / Talos II Lite systems available now.

Unless something changes dramatically, board firmware and microcode should still be open as they are with the current product, they also managed to convince IBM to publish full hardware manuals or something like that (which is important for board firmware development), the stuff Intel keeps behind NDAs for their hardware.

It's not "open hardware" in a strict sense. I don't think they have board and CPU schematics.

Actually, we ship full schematics of the product along with every machine / mainboard sold. This is one of our core offerings and is not going anywhere, the new design is no different from an open perspective.

Does any POWER9 CPU have a TDP that could accommodate a fanless chassis design? (Airtop can house a Xeon.)

IBM's TDP numbers are a maximum possible power consumption, not an average that can be exceeded like Intel, AMD, and ARM. All I'm permitted to say at this point is that the new design may be interesting from your perspective.

Since the IBM Power9 does have NVLink... any chance of a NVLink interface from the CPU that could be used with an GPU or FPGA devboard?

Not for this particular system, but your request will very likely be handled by something that is already on our internal roadmap.

Which part of this is "open" ?

Everything from the schematics through the low level firmware to the kernel itself. These machines require no binary blobs whatsoever to operate.

If you're curious, we have a large Wiki full of documentation at https://wiki.raptorcs.com. In particular, take a look at the Documentation category at https://wiki.raptorcs.com/wiki/Categoryocumentation : you can download a copy of the processor datasheet, look through over 6,000 pages of register documentation, pull source from https://git.raptorcs.com -- these machines are literally more open than the current SiFive development boards and the Lite is at a similar price point. What's not to like?

[edwaleni]

IBM has POWER9 Sforza documentation here:

https://www-355.ibm.com/systems/power/openpower/tgcmDocumentRepository.xhtml?aliasId=POWER9_Sforza

[grok]

Since the IBM Power9 does have NVLink... any chance of a NVLink interface from the CPU that could be used with an GPU or FPGA devboard?

Low chance and certainly not on this new hardware :

POWER9 Sforza is the smallest IBM modules for this architecture at 50 x 50mm and support 4 x DDR4 and 48 PCI Express lanes and no OpenCAPI lanes.

Now nvidia has put NVLink on consumer boards (RTX2080)
One may imagine an FPGA board that can use the same "bridge connector" and thus link with the nvidia board. But you'll have to ask nvidia about this. Perhaps they are not interested! They're not known for being very open, see the drama around the nouveau driver or Wayland.
Maybe ask IBM as they're the only ones with NVLink hardware except nvidia ; it's not on regular POWER9 hardware either. It's all special hardware that takes nvidia "Mezzanine" cards I believe?

You might be stuck behind high costs and power politics.
Another prospect would be an FPGA that plugs in a Xeon socket in a multi-socket motherboard. It's somewhat realistic to expect this (maybe in the new bigger socket that will be used for 28-core i9) but there'd be a lot of licensing and lawyers around this. Won't be cheap.
PCIe 4.0 will be cheap (if both your FPGA board and the POWER9 have OpenCAPI, you can have memory coherency although supporting it on the "virtual" hardware you run on the FPGA might be very complex and prone to horrible bugs?)

An illustration of power politics :

https://en.wikipedia.org/wiki/Gen-Z

The consortium was publicly announced on October 11, 2016.^[2] Server vendor members include Cray, Dell Technologies, Hewlett Packard Enterprise, Huawei, IBM, and Lenovo. CPU vendor members include Advanced Micro Devices, ARM Holdings, Broadcom Limited, Cavium and IBM. Memory and storage vendor members include Micron Technology, Samsung, Seagate Technology, SK Hynix, and Western Digital. Other members include IDT Corporation, Mellanox Technologies, Microsemi, Red Hat, and Xilinx.^[1] Analysts noted the absence of Intel (which announced an inter-connect technology of its own called Omni-Path a year before), Nvidia (with its own NVLink technology),^[3] and Cisco Systems.^[4][2]

So maybe you're a couple years too early for the high bandwidth feast. In your line of work may CAPI will be useful in the nearest term else bare PCIe 4.0, then PCIe 5.0 or Gen-Z (royalty-free standard)