LLVM/Clang 9.0 Picks Up Support For Arm's Cortex-A76

[phoronix]

Phoronix: LLVM/Clang 9.0 Picks Up Support For Arm's Cortex-A76

For those interested in Arm's Cortex-A76 that was announced last year, this CPU with "desktop-class performance with smartphone efficiency" is now supported by the LLVM Clang compiler...

http://www.phoronix.com/scan.php?page=news_item&px=LLVM-Clang-Cortex-A76

[coder]

the Cortex-A76 offers 40% better power efficiency and 35% better performance over the Cortex-A75.

Not simultaneously.

To quote Anandtech:

When it comes to power and energy efficiency, Arm made two claims: At the same power usage, the Cortex A76 would perform 40% better than the Cortex A75, and at the same performance point, the Cortex A76 would use only 50% of the energy of a Cortex A75. Of course these two figures are to be taken with quite a handful of salt as the comparison was made across process nodes.

(emphasis added)

Source: https://www.anandtech.com/show/13614...x-a76-promises

[ldesnogu]

To quote Anandtech:

In SPECint2006, the Snapdragon 855 performs 51% better than the Snapdragon 845, all while improving power efficiency by 39% over its predecessor.

https://www.anandtech.com/show/13786/snapdragon-855-performance-preview/2

That's simultaneous, but there's indeed a change in process from 10nm to 7nm. That's nonetheless impressive.

[coder]

To quote Anandtech:https://www.anandtech.com/show/13786...ance-preview/2

That's simultaneous, but there's indeed a change in process from 10nm to 7nm. That's nonetheless impressive.

That's one (old) benchmark (suite), whereas the quoted claims from ARM were across-the-board (and included the benefits of the node shrink).

More importantly, I think SPECint2006 is single-threaded, which makes this point from the first page of that article particularly relevant:

Although the SoC still comes in a “4+4” big.LITTLE high-level core configuration, the big cores in the S855 aren’t actually all equal: Here Qualcomm has gone for a rather exotic 1+3+4 configuration, in which one of the big cores is implemented with a higher frequency physical design reaching 2857MHz, all while also employing a larger L2 cache of 512KB.

(emphasis added)

[ldesnogu]

That's one (old) benchmark (suite), whereas the quoted claims from ARM were across-the-board (and included the benefits of the node shrink).

That's what I wrote: there's a node shrink between the two and this explains in part the improvements.

SPEC 2006, no matter how old it is, is better than many other "modern" benchmarks, though I certainly agree with you that a much broader selection of benchmarks is needed to get a better picture.

More importantly, I think SPECint2006 is single-threaded, which makes this point from the first page of that article particularly relevant:
(emphasis added)

Yeah it's single-threaded, but that's what I was discussing and what ARM was claiming: single core perf

[coder]

That's what I wrote: there's a node shrink between the two and this explains in part the improvements.

It seemed to me like you were using it as an explanation of the discrepancy between the numbers.

SPEC 2006, no matter how old it is, is better than many other "modern" benchmarks, though I certainly agree with you that a much broader selection of benchmarks is needed to get a better picture.

Where it could matter is in terms of things like the size of the datasets used, and therefore susceptibility to things like cache size increases.

Yeah it's single-threaded, but that's what I was discussing and what ARM was claiming: single core perf

But intensive, single-threaded workloads are going to be run on the faster big core, with the bigger cache. See the second quote, in my previous post.