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Linux 5.16 KVM To Land RISC-V Hypervisor Support

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  • Linux 5.16 KVM To Land RISC-V Hypervisor Support

    Phoronix: Linux 5.16 KVM To Land RISC-V Hypervisor Support

    Coming with the Linux 5.16 kernel cycle will be support for RISC-V virtualization with the Kernel-based Virtual Machine (KVM)...

    Phoronix, Linux Hardware Reviews, Linux hardware benchmarks, Linux server benchmarks, Linux benchmarking, Desktop Linux, Linux performance, Open Source graphics, Linux How To, Ubuntu benchmarks, Ubuntu hardware, Phoronix Test Suite

  • #2
    The RISC-V ISA recently settled on its hypervisor extension and its spec is now considered frozen.
    Wow that's awesome! I seem to remember it being a huge pain point with RISC-V and people complained that after so many years it wasn't stable.

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    • #3
      Originally posted by kvuj View Post

      Wow that's awesome! I seem to remember it being a huge pain point with RISC-V and people complained that after so many years it wasn't stable.
      Yeah, but I don't know if there are any mistakes in in the RISC-V ISA and if maybe ARMv8 (and ARMv9) are better than RISC-V. I've heard some rumors about the RISC-V ISA not being all that good. Everyone seem to agree that ARMv8 is great though.

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      • #4
        Originally posted by uid313 View Post

        Yeah, but I don't know if there are any mistakes in in the RISC-V ISA and if maybe ARMv8 (and ARMv9) are better than RISC-V. I've heard some rumors about the RISC-V ISA not being all that good. Everyone seem to agree that ARMv8 is great though.
        Can you share links to this discussions?
        I don't know much of ISA, but want to read some arguments (positive and negative) on RISC-V.

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        • #5
          Originally posted by jonix View Post

          Can you share links to this discussions?
          I don't know much of ISA, but want to read some arguments (positive and negative) on RISC-V.


          This is a post by an ex-ARM engineer. The post is quite technical.

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          • #6
            Originally posted by uid313 View Post



            This is a post by an ex-ARM engineer. The post is quite technical.
            Ahh, this is it! I made some similar comments here that I thought I read some complaints about RISC-V, but couldn't remember where. This is what I read. That said, all this is over my understanding (especially since I skimmed it), but yeah someone took issue. I cannot judge good or bad, just know I read this.

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