x86-64-v5? Questions Arise Over The Future Of x86-64 Micro-Architecture Feature Levels

[phoronix]

Phoronix: x86-64-v5? Questions Arise Over The Future Of x86-64 Micro-Architecture Feature Levels

While recently there has been more Linux distribution vendor interest in evaluating x86-64-v2 and/or x86-64-v3 baselines for future Linux distribution releases as well as offering optimized packages for higher x86-64 baselines either for x86-64-v3 with being able to assume AVX/AVX2 or in the x86-64-v4 level where AVX-512 is introduced, the prospect of x86-64 micro-architecture feature levels for future processors isn't clear...

https://www.phoronix.com/news/x86-64-v5-Questioned

[TemplarGR]

This is such a non-issue.... Just make AVX10 mandatory for v5, anything that lacks it, remains v4. Even if it is released in the future. Feature levels for a compiler are not just release-date based....

[garloff]

For sanity, v2 is a superset of the baseline (cx16, popcnt, lahf, sss3, sse4.1, sse4.2 added), v3 a superset of v2 (with avx, avx2, bmi1, bmi2, f16c, fma, abm, movbe, xsave added) , v4 a superset of v3 ( with avx512f, avx512bw/, avx512cd, avx512dq, avx512vl added)

With AVX512 not being guaranteed with AVX10, I can't see AVX10 getting a v5 or v6. It may be a v3.1, v3.2 or so.

Or intel becomes sane and always includes the avx512 insns needed for -v4, though not necessarily with the full performance (like zen4 does very successfully).

[ptr1337]

Well, I would generally welcome that, since the x86-64-v4 (zen4/icelake) target could see a lot of improvements.
Doing this before Intel will ship AVX10 sounds also good as well as (maybe) introducing an own target for avx10, if required.

In CachyOS we thought also about this for long time, since the x86-64-v4 instructionset compared to the Zen4 is pretty different, but we didnt wanted to exclude some users from a generic march.
Maybe a dedicated repository would make sense, we have some computing power left which could do that.

[Kjell]

I'm surprised there's no WIKI with list of distros that offer "full" & "glibc-hwcaps" x86-64-v{5,4,3,2,1} binaries

[edxposed]

It's very simple, just learn from USBIF's advanced experience and invent x86-64-v4.1, x86-64-v4.1 Gen2, x86-64-v4.2.

[SofS]

Well, they were thinking about x86S as well, so they could go with x86-64-V5 for the full IceLake/Zen4 AVX512, x86-Sn for x86S and x86-Xv.s for AVX10. Where v stands for version and s the scalar size above 256bits, that is, 256 would be 1, 512 would be 2, if they come up with a 1024 it would be 4 and so on.

[rmoog]

Messages must have at least 5 words.

[dragorth]

Well, they were thinking about x86S as well, so they could go with x86-64-V5 for the full IceLake/Zen4 AVX512, x86-Sn for x86S and x86-Xv.s for AVX10. Where v stands for version and s the scalar size above 256bits, that is, 256 would be 1, 512 would be 2, if they come up with a 1024 it would be 4 and so on.

If we are only talking about Intel, x86s should be the start of a new Arch. Have we heard anything from AMD about their plans with this? It might make sense to split them at that point, in which case, you just use whatever AVX10 closest matches to AMDs level, and then x86s for Intel optimizations.

GCC now has the ability to pick the best library version for the arch anyway, right? Is anybody using that?

[Kjell]

If we are only talking about Intel, x86s should be the start of a new Arch.

Fragmentation is never good.