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GCC Tackling Support For ARMv8-M Security Extensions

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  • GCC Tackling Support For ARMv8-M Security Extensions

    Phoronix: GCC Tackling Support For ARMv8-M Security Extensions

    GCC developers have been working to support the compiler-side changes for dealing with ARMv8-M Security Extensions...

    Phoronix, Linux Hardware Reviews, Linux hardware benchmarks, Linux server benchmarks, Linux benchmarking, Desktop Linux, Linux performance, Open Source graphics, Linux How To, Ubuntu benchmarks, Ubuntu hardware, Phoronix Test Suite

  • #2
    Looking at the doc, they do this weird thing where the LSB of the program counter is a status bit indicating secure/nonsecure. As I recall, they did the same thing for “thumb” mode in 32-bit ARM.

    Why couldn’t they just have used a bit in a processor status register, like other architectures do? Or do they have a patent on this technique?

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