AMD Reveals Latest Plans For Open-Source openSIL With Replacing AGESA, Zen 6 Milestone

Last year to much excitement in our community was the new AMD project announcement of openSIL as an open-source CPU silicon initialization project that is an advancement for open-source firmware and to eventually replace AMD's AGESA across both client and server processors. This week an exciting new update on AMD OpenSIL was shared and that they are still on-track for having it production-ready next year.

AMD openSIL was open-sourced last June and so far has been ported to select AMD reference boards along with an experimental port by Supermicro to one of their motherboards. It's been progressing steady and yesterday at the Open-Source Firmware Conference in Germany was a much anticipated status update on the openSIL project.

AMD firmware engineer Paul Grimes presented on the openSIL project at the OSFC conference on Wednesday in Germany. Here are some of the highlights from yesterday's OSFC 2024 presentation.

Last year their intentions were indicated that AMD expected to have openSIL production ready in the 2025~2026 timeframe. They're still on track. In fact, now they specifically name 6th Gen AMD EPYC "Zen 6" processors as having production-level feature, validation, and QA for openSIL.

Interestingly they also now outline that they will be publishing their AMD openSIL code for new platforms one quarter after the hardware launch. Not quite as ideal as developing completely in the open but understandably new hardware development is done in private especially as it pertains to sensitive areas around new/unannounced features, etc. The one quarter after drop is likely for going through legal review and any other internal processes.

Venice as a reminder is the codename for AMD EPYC Zen 6 processors.

AMD has been working on 5th Gen EPYC "Turin" support already and anticipate releasing its MIT open-source code before the end of the calendar year. Phoenix SoCs have also been seeing openSIL enablement ongoing.

AMD is also working to ramp up its open-source contributions to TianoCore albeit a slow process.

AMD is planning to upstream their EDKII-Turin platform code to TianoCore in the fourth quarter.

With Zen 6 processors is where the AMD openSIL support will be production-ready and become rather exciting... For AMD 6th Gen EPYC "Venice" the openSIL code will still be paired with Agesa-v10 as it's being phased out. This generation at least will still rely on pre-x86 PSP binaries.

Exciting with the note "bootable open source solution committed" for the Zen 6 era hardware.

And then for what sounds like could be Zen 7 is when more of the AGESA code will be phased out and openSIL incorporating more responsibilities. AMD will also be "strengthening" their Coreboot support as well as Tianocore contributions.

AMD is also working to establish a community-based governance model for the open-source openSIL project.

Also very notable with this slide is the continued confirmation of "active development [of Coreboot] in AMD CLient and Embedded space" and that the server product roadmap for using Coreboot is "trending post Venice", so again potentially for Zen 7.

As we move closer to AMD EPYC Venice timeline -- and new EPYC Turin server platforms ahead -- hopefully we'll be hearing more from other OEMs and ODMs about their work around AMD openSIL and Coreboot. For now MiTAC (Tyan) and Supermicro are among the early AMD partners already engaging with openSIL in proof-of-concept/experimental form.

AMD openSIL remains a very exciting AMD open-source project to watch over the coming months and years. I am super excited and have longed to see AMD embrace more open-source firmware like they used to do many years ago with open-source AGESA / Coreboot contributions and the like. It's also been very refreshing with newer AMD reference boards and even some partner servers running OpenBMC for their BMC software stack. AMD has also been doing more around Sound Open Firmware and other open-source firmware efforts like publishing SEV firmware as open-source. Exciting times ahead.