AMX-AVX512 Support Merged For LLVM Clang 20 Compiler
As the latest on the compiler enablement front for Intel's next-gen Xeon "Diamond Rapids processors, LLVM Git has merged support for the AMX-AVX512 instructions for next spring's Clang 20 compiler release.
AMX-AVX512 is one of several new ISA additions around Advanced Matrix Extensions (AMX) that are coming with Xeon Diamond Rapids. Intel's open-source compiler engineers for both LLVM/Clang and GCC have been working on enabling the several new ISA additions to be found with next year's Xeon processors. The -march=diamondrapids patch confirms all of the new ISA additions compared to current Xeon Granite Rapids processors.
The latest Intel PPM details all of the new instruction details for those interested in that information.
It's with this commit overnight that AMX-AVX512 was merged for LLVM. The other recent Intel additions to LLVM 20 include AMX-FP8 and AMX-TRANSPOSE too. By the time of the LLVM/Clang 20.1 release next ~March all of the Intel Diamond Rapids compiler support will likely be addressed.
AMX-AVX512 is one of several new ISA additions around Advanced Matrix Extensions (AMX) that are coming with Xeon Diamond Rapids. Intel's open-source compiler engineers for both LLVM/Clang and GCC have been working on enabling the several new ISA additions to be found with next year's Xeon processors. The -march=diamondrapids patch confirms all of the new ISA additions compared to current Xeon Granite Rapids processors.
The latest Intel PPM details all of the new instruction details for those interested in that information.
It's with this commit overnight that AMX-AVX512 was merged for LLVM. The other recent Intel additions to LLVM 20 include AMX-FP8 and AMX-TRANSPOSE too. By the time of the LLVM/Clang 20.1 release next ~March all of the Intel Diamond Rapids compiler support will likely be addressed.
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