Intel Updates Alder Lake P Scheduler Model For LLVM/Clang

An updated scheduler model for Intel Alder Lake P processors has been merged into the LLVM compiler after finding some differences compared to Intel's documentation/guidance.

Intel engineer Haohai Wen updated the Alder Lake P model for the LLVM compiler after finding some differences. Wen explained in the commit:

"The previous Alderlake P-Core model prefer data from uops.info than intel doc. Some measures latency from uops.info is larger than real latency. e.g. addpd latency is 3 in uops.info while 2 in intel doc. This patch adjust the priority of those two data source so that intel doc is more preferable."

So for those with Intel Alder Lake (and Raptor Lake) laptops, this is good news having more accurate details in the scheduler model for those tuning their compiled binaries for their hardware.

See this commit for the Intel ADL-P model tuning.