RISC-V Sees Support For New ISA Extensions In Linux 6.11
Most significant with the RISC-V updates this cycle are adding support for various new ISA extensions. Newly-enabled RISC-V extensions include the Zve32[xf] and Zve64[xfd] sub-extensions of the vector extension, Zimop and Zcmop for may-be-operations, the Zca / Zcf / Zcd / Zcb sub-extensions of the C extension, and Zawrs. The vector permutation extensions (Zve*) may be of interest to some along with Zawrs as the wait-on-reservation-set for helping to allow RISC-V cores to enter a low power state while waiting on a store to a memory location.
RISC-V with Linux 6.11 also has a number of performance improvements and memory hot-plugging support. The RISC-V memory hot-plugging code also allows for memory hot un-plugging.
More details on the RISC-V changes to find for the Linux 6.11 merge window via this pull request.
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