PCIe 7.0 Specification v0.5 Published - Full Spec Next Year
The PCIe 7.0 specification remains on track for finalizing in the 2025 calendar year while now v0.5 has been released to PCI-SIG members. PCIe 7.0 is working toward 512 GB/s bi-directional bandwidth in a PCIe x16 configuration and utilizing PAM4 signaling.
Today's v0.5 specification for PCIe 7.0 succeeds last summer's initial (v0.3) spec release. The PCI Express 7.0 highlights per the PCI-SIG are:
- Delivering 128 GT/s raw bit rate and up to 512 GB/s bi-directionally via x16 configuration
- Utilizing PAM4 (Pulse Amplitude Modulation with 4 levels) signaling
- Focusing on the channel parameters and reach
- Continuing to deliver low-latency and high-reliability targets
- Improving power efficiency
- Maintaining backwards compatibility with all previous generations of PCIe technology
The immense bandwidth of PCIe 7.0 will be important for future AI accelerators, 800G+ Ethernet, and the ever-growing needs of HPC and hyperscalers.
More details on the PCIe 7.0 v0.5 spec via PCISIG.com.
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