MIPS Finally Posts GCC Compiler Patch For P6600 Series, But Might Be Rejected

The MIPS P6600 processor was announced in 2015 as one of the Warrior Processors based upon MIPS64 Release 6. The P6600 is based on a 28nm process, clock speeds up to 2.0GHz, and is the fastest performing of the MIPS Warrior cores. Only now has MIPS posted an enablement patch for the MIPS P6600 with GCC.

At the start of June a MIPS Technologies engineer posted the GCC patch for bringing up the P6600 and allowing -march=p6600. But even though this patch is here three years later, at this point it's not going to be accepted.

GCC MIPS port maintainer Matthew Fortune has pointed out that the MIPS website no longer contains any architecture-specific documentation. Documents on existing MIPS generations was removed and he hasn't seen any public documentation at all for the P6600. Without any formal documentation being published for understanding the micro-architecture better and other developers being able to understand and maintain it moving forward, the P6600 support will be rejected.

So far MIPS hasn't responded whether they plan to restore the public CPU micro-architecture documentation or not. As part of this recent GCC MIPS push, there was also an updated i6400 scheduler and aliasing i6500.